A Digital to Analog Converter (DAC) is a circuit that takes a number of digital bits as input and produces a corresponding analog output. One approach to DAC design is so-called resistor-string or R-DAC. That circuit topology arranges a number of resistors in series between a high and low reference voltage. An array of switches coupled to the resistors are controlled by the digital input bits to determine the output. The number of resistors depends on the desired resolution of the DAC—in the simplest conceptual approach for an 17-bit converter, for example, 217−1 or 131,070 resistors are typically needed to provide all possible output levels.
A “segmented” R-DAC reduces the total number of required resistors by using multiple string segments. The first segment, controlled by most significant input bits, provides a coarse output approximation. The second and subsequent segments, controlled by lesser significant bits, provides finer selection of the output.
Resistor-string DACs are a suitable architecture when monotonicity is a major concern. However, this architecture is not practical for high-resolution DACs, as the number of elements increases exponentially with resolution. Consequently, segmented R-DAC architectures usually strike the right compromise between monotonicity and complexity for high resolution DACs. Segmented R-DAC architectures have the drawback of requiring buffer elements to alleviate resistor ladder loading caused by subsequent segments. Buffers are undesirable since they increase power consumption and are a major source of noise. In addition, for rail-to-rail operation the input offset transitions of the buffer can cause nonmonotonicity. Un-buffered segmented R-DAC architectures thus are also possible.
Of interest is U.S. Pat. No. 5,703,588 issued to Rivoir et al. which describes a dual resistor string R-DAC that uses current biasing to isolate a first resistor segment from a second resistor segment. Specifically, to prevent the second resistor segment from drawing current from the first resistor segment, a current source feeds a bias current into the second segment and a current drain draws bias current from the second segment.